7-63 7 bv dss /r ds(on) i d(on) v gs(th) bv dgs (max) (min) (max) 20v 1.3 w 0.5a 1.0v TN0702n3 TN0702 low threshold n-channel enhancement-mode vertical dmos fets package options note: see package outline section for dimensions. to-92 low threshold dmos technology these low threshold enhancement-mode (normally-off) transis- tors utilize a vertical dmos structure and supertexs well-proven silicon-gate manufacturing process. this combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in mos devices. characteristic of all mos structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. supertexs vertical dmos fets are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. to-92 ordering information order number / package features low threshold 1.0 volt max on resistance guaranteed at v gs = 2, 3, and 5 volts high input impedance low input capacitance 130pf typical fast switching speeds low on resistance free from secondary breakdown low input and output leakage applications logic level interfaces solid state relays battery operated systems photo voltaic drives analog switches general purpose line drivers telecom switches absolute maximum ratings drain-to-source voltage bv dss drain-to-gate voltage bv dgs gate-to-source voltage 20v operating and storage temperature -55 c to +150 c soldering temperature* 300 c * distance of 1.6 mm from case for 10 seconds maximum. s g d
7-64 TN0702 switching waveforms and test circuit 90% 10% 90% 90% 10% 10% pulse generator v dd r l output d.u.t. t (on) t d(on) t (off) t d(off) t f t r input input output 10v v dd r gen 0v 0v package i d (continuous)* i d (pulsed) power dissipation q jc q ja i dr *i drm @ t c = 25 c c/w c/w to-92 0.6a 1.0a 1w 125 170 0.6a 1.0a * i d (continuous) is limited by max rated t j . thermal characteristics bv dss drain-to-source breakdown voltage 20 v v gs = 0v, i d = 1ma v gs(th) gate threshold voltage 0.5 0.8 1.0 v v gs = v ds , i d = 1.0ma d v gs(th) change in v gs(th) with temperature -4.0 mv/ cv gs = v ds , i d = 1.0ma i gss gate body leakage 100 na v gs = 20v, v ds = 0v i dss zero gate voltage drain current 100 na v ds = 20v, v gs = 0v 100 m a i d(on) on-state drain current 0.5 1.0 a v gs = v ds = 5v 4.0 5.0 v gs = 2v, i d = 50ma r ds(on) 1.9 2.5 w v gs = 3v, i d = 200ma 1.0 1.3 v gs = 5v, i d =500ma d r ds(on) change in r ds(on) with temperature 0.75 %/ cv gs = 5v, i d = 500ma g fs forward transconductance 100 500 m v ds = 5v, i d = 500ma c iss input capacitance 130 200 c oss common source output capacitance 70 125 pf v gs = 0v, v ds = 20v, f =1mhz c rss reverse transfer capacitance 30 60 t d(on) turn-on delay time 20 t r rise time 20 ns t d(off) turn-off delay time 30 t f fall time 20 v sd diode forward voltage drop 1.0 v v gs = 0v, i sd = 0.5a symbol parameter min typ max unit conditions electrical characteristics (@ 25 c unless otherwise specified) v dd = 20v, i d = 0.5a, r gen = 25 w v ds = 0.8 max rating, v gs = 0v, t a = 125 c notes: 1. all d.c. parameters 100% tested at 25 c unless otherwide stated. (pulse test: 300 m s pulse, 2% duty cycle.) 2. all a.c. parameters sample tested. w static drain-to-source on-state resistance
7-65 7 TN0702 typical performance curves power dissipation vs. case temperature 0 150 100 50 2.0 to-92 125 75 25 t c c) ( output characteristics 5 4 3 2 1 0 0 v ds (volts) i (amperes) d saturation characteristics 0246 10 8 v ds (volts) i (amperes) d maximum rated safe operating area 0.1 100 10 1 0.1 1.0 10 to-92 (dc) v ds (volts) i (amperes) d thermal response characteristics thermal resistance (normalized) 1.0 0.8 0.6 0.4 0.2 0.001 10 0.01 0.1 1 t p (seconds) transconductance vs. drain current 2.0 05 1234 g fs (siemens) i d (amperes) t a = 125 c d p (watts) 1.0 to-92 t c = 25 c p d = 1w v gs = 8v 0 0.01 0 v gs = 6v v gs = 4v v gs = 3v v gs = 2v t a = 25 c t c = 25 c t a = -55 c to-92 (pulsed) 1.0 0 v gs = 8v v gs = 6v v gs = 4v v gs = 3v v gs = 2v 5 4 3 2 1 0 v gs = 5v v gs = 5v 5 101520 v ds = 5v
7-66 typical performance curves gate drive dynamic characteristics 10 8 6 4 2 0 0.6 1.2 1.8 3.0 2.4 1.4 1.2 1.0 0.8 0.6 -50 0 50 100 150 1.6 1.4 1.2 1.0 0.8 0.6 on-resistance vs. drain current 0 2.5 1.2 1.0 0.8 -50 0 50 100 150 transfer characteristics 5 4 3 2 1 0 0246 10 8 v ds = 5v capacitance vs. drain-to-source voltage 200 150 100 50 0 5 10 15 20 c (picofarads) 146 pf 1.0 bv v (th) @ 1ma r ds(on) @ 5v, 500ma 0 0 c iss v gs = 5v 0.5 1.5 2.0 200pf c oss c rss t a = -55 c t a = 25 c t a = 125 c f = 1mhz r ds(on) (ohms) bv dss (normalized) t j ( c) t j ( c) i d (amperes) bv dss variation with temperature v gs = 3v v gs = 2v r ds(on) (normalized) v (th) and r ds variation with temperature v gs (volts) i d (amperes) v gs(th) (normalized) q g (nanocoulombs) v gs (volts) v ds (volts) v ds = 10v v ds = 20v TN0702
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